I have a block of MIPS code that implements a pseudo-instruction operating on the values from two registers. The problem is i am having trouble undertanding what it does. The code is:
sll $t0, $s0, 31
srl $s0, $s0, 1
srl $s1, $s1, 1
or $s1, $s1, $t0
I think it is a divide by 2 checker? If any one can help me out with what it does, that would be great.
Cheers
I have little knolage of assembler but here is my thoughts
sll $t0, $s0, 31
We are shifting whatever is in $s0 left 31 places, assuming we have a 32 bit register.. this will mean that if the lowest bit is 1 then the result will be
10000000000000000000000000000000 and if the lowest bit is 0 then result 00000000000000000000000000000000 this will be put in the register dictated by $t0....
srl $s0, $s0, 1
shift whatever is in $s0 right 1 and assign it to $s0.. I don't see $s0 being used again.. therefor don't have a clue why we would do this...
srl $s1, $s1, 1
whatever is in $s1 will be shifted right 1 placed back into $s1
or $s1, $s1, $t0
or the two values together then place them back into $s1.
so since we have shifted s1 right one, Its highest bit will be 0, therefor the highest bit of the future s1 depends on the lowest bit of $s0.
Thefore what this appears to do, is if s0 is even, the resulting number will will have 0 in the highest bit, while if s0 is odd the resulting number will have 1 in the highest bit.....
why we would do this, I don't know... But please somone enlighten me