Hi,
The code works for i_MMCM_ADV
But not working for X_MMCM_ADV
My requirement is reg expression starting x_MMCM_ADV
and end with semicolan in I_MMCM_ADV module
first file
X_MMCM_ADV #(
.CLOCK_HOLD ( "FALSE" ),
.CLKOUT4_CASCADE ( "FALSE" ),
.BANDWIDTH ( "OPTIMIZED" ),
.CLKFBOUT_USE_FINE_PS ( "FALSE" ),
.CLKOUT0_USE_FINE_PS ( "FALSE" ),
.CLKOUT1_USE_FINE_PS ( "FALSE" ),
.CLKOUT2_USE_FINE_PS ( "FALSE" ),
.CLKOUT3_USE_FINE_PS ( "FALSE" ),
.CLKOUT4_USE_FINE_PS ( "FALSE" ),
.CLKOUT5_USE_FINE_PS ( "FALSE" ),
.CLKOUT6_USE_FINE_PS ( "FALSE" ),
.COMPENSATION ( "ZHOLD" ),
.STARTUP_WAIT ( "FALSE" ),
.CLKFBOUT_MULT_F ( 5.000000 ),
.CLKFBOUT_PHASE ( 0.000000 ),
.CLKOUT0_DIVIDE_F ( 10.000000 ),
.CLKOUT0_DUTY_CYCLE ( 0.500000 ),
.CLKOUT0_PHASE ( 0.000000 ),
.CLKOUT1_DUTY_CYCLE ( 0.500000 ),
.CLKOUT1_PHASE ( 0.000000 ),
.CLKOUT2_DUTY_CYCLE ( 0.500000 ),
.CLKOUT2_PHASE ( 0.000000 ),
.CLKOUT3_DUTY_CYCLE ( 0.500000 ),
.CLKOUT3_PHASE ( 0.000000 ),
.CLKOUT4_DUTY_CYCLE ( 0.500000 ),
.CLKOUT4_PHASE ( 0.000000 ),
.CLKOUT5_DUTY_CYCLE ( 0.500000 ),
.CLKOUT5_PHASE ( 0.000000 ),
.CLKOUT6_DUTY_CYCLE ( 0.500000 ),
.CLKOUT6_PHASE ( 0.000000 ),
.REF_JITTER1 ( 0.010000 ),
.REF_JITTER2 ( 0.010000 ),
.CLKOUT1_DIVIDE ( 20 ),
.CLKOUT2_DIVIDE ( 40 ),
.CLKOUT3_DIVIDE ( 60 ),
.CLKOUT4_DIVIDE ( 80 ),
.CLKOUT5_DIVIDE ( 100 ),
.CLKOUT6_DIVIDE ( 120 ),
.DIVCLK_DIVIDE ( 1 ),
.CLKIN1_PERIOD ( 5 ),
.CLKIN2_PERIOD ( 5 ),
.LOC ( "MMCM_ADV_X0Y0" ),
.VCOCLK_FREQ_MAX ( 1200.000000 ),
.VCOCLK_FREQ_MIN ( 600.000000 ),
.CLKIN_FREQ_MAX ( 700.000000 ),
.CLKIN_FREQ_MIN ( 10.000000 ),
.CLKPFD_FREQ_MAX ( 450.000000 ),
.CLKPFD_FREQ_MIN ( 10.000000 ))
i_MMCM_ADV (
.CLKFBIN(CLKFBIN),
.PSCLK(GND),
.PWRDWN(\i_MMCM_ADV/PWRDWN_INT ),
.DCLK(GND),
.DEN(GND),
.CLKINSEL(\i_MMCM_ADV/CLKINSEL_INT ),
.CLKIN2(GND),
.RST(\i_MMCM_ADV/RST_INT ),
.PSINCDEC(\i_MMCM_ADV/PSINCDEC_INT ),
.DWE(GND),
.PSEN(\i_MMCM_ADV/PSEN_INT ),
.CLKIN1(clk_IBUF_7819),
.CLKOUT3(CLKOUT3),
.CLKOUT3B(\i_MMCM_ADV/CLKOUT3B ),
.CLKFBOUT(CLKFBOUT),
.CLKFBSTOPPED(\i_MMCM_ADV/CLKFBSTOPPED ),
.CLKFBOUTB(\i_MMCM_ADV/CLKFBOUTB ),
.CLKOUT1(CLKOUT1),
.CLKOUT5(CLKOUT5),
.DRDY(\i_MMCM_ADV/DRDY ),
.CLKOUT0(clk_out0_OBUF_7848),
.CLKOUT4(CLKOUT4),
.CLKOUT1B(\i_MMCM_ADV/CLKOUT1B ),
.CLKINSTOPPED(\i_MMCM_ADV/CLKINSTOPPED ),
.CLKOUT0B(\i_MMCM_ADV/CLKOUT0B ),
.CLKOUT2(CLKOUT2),
.CLKOUT2B(\i_MMCM_ADV/CLKOUT2B ),
.PSDONE(\i_MMCM_ADV/PSDONE ),
.CLKOUT6(CLKOUT6),
.LOCKED(i_MMCM_ADV_ML_NEW_I1),
.DI({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}),
.DADDR({GND, GND, GND, GND, GND, GND, GND}),
.DO({\i_MMCM_ADV/DO15 , \i_MMCM_ADV/DO14 , \i_MMCM_ADV/DO13 , \i_MMCM_ADV/DO12 , \i_MMCM_ADV/DO11 , \i_MMCM_ADV/DO10 , \i_MMCM_ADV/DO9 ,
\i_MMCM_ADV/DO8 , \i_MMCM_ADV/DO7 , \i_MMCM_ADV/DO6 , \i_MMCM_ADV/DO5 , \i_MMCM_ADV/DO4 , \i_MMCM_ADV/DO3 , \i_MMCM_ADV/DO2 , \i_MMCM_ADV/DO1 ,
\i_MMCM_ADV/DO0 })
);
Second file
X_MMCM_ADV #(
.CLOCK_HOLD ( "FALSE" ),
.CLKOUT4_CASCADE ( "FALSE" ),
.BANDWIDTH ( "OPTIMIZED" ),
.CLKFBOUT_USE_FINE_PS ( "FALSE" ),
.CLKOUT0_USE_FINE_PS ( "FALSE" ),
.CLKOUT1_USE_FINE_PS ( "FALSE" ),
.CLKOUT2_USE_FINE_PS ( "FALSE" ),
.CLKOUT3_USE_FINE_PS ( "FALSE" ),
.CLKOUT4_USE_FINE_PS ( "FALSE" ),
.CLKOUT5_USE_FINE_PS ( "FALSE" ),
.CLKOUT6_USE_FINE_PS ( "FALSE" ),
.COMPENSATION ( "EXTERNAL" ),
.STARTUP_WAIT ( "FALSE" ),
.CLKFBOUT_MULT_F ( 5.000000 ),
.CLKFBOUT_PHASE ( 0.000000 ),
.CLKOUT0_DIVIDE_F ( 10.000000 ),
.CLKOUT0_DUTY_CYCLE ( 0.500000 ),
.CLKOUT0_PHASE ( 0.000000 ),
.CLKOUT1_DUTY_CYCLE ( 0.500000 ),
.CLKOUT1_PHASE ( 0.000000 ),
.CLKOUT2_DUTY_CYCLE ( 0.500000 ),
.CLKOUT2_PHASE ( 0.000000 ),
.CLKOUT3_DUTY_CYCLE ( 0.500000 ),
.CLKOUT3_PHASE ( 0.000000 ),
.CLKOUT4_DUTY_CYCLE ( 0.500000 ),
.CLKOUT4_PHASE ( 0.000000 ),
.CLKOUT5_DUTY_CYCLE ( 0.500000 ),
.CLKOUT5_PHASE ( 0.000000 ),
.CLKOUT6_DUTY_CYCLE ( 0.500000 ),
.CLKOUT6_PHASE ( 0.000000 ),
.REF_JITTER1 ( 0.010000 ),
.REF_JITTER2 ( 0.010000 ),
.CLKOUT1_DIVIDE ( 20 ),
.CLKOUT2_DIVIDE ( 40 ),
.CLKOUT3_DIVIDE ( 60 ),
.CLKOUT4_DIVIDE ( 80 ),
.CLKOUT5_DIVIDE ( 100 ),
.CLKOUT6_DIVIDE ( 120 ),
.DIVCLK_DIVIDE ( 1 ),
.CLKIN1_PERIOD ( 5.000000 ),
.CLKIN2_PERIOD ( 5.000000 ),
.LOC ( "MMCM_ADV_X0Y5" ),
.VCOCLK_FREQ_MAX ( 1200.000000 ),
.VCOCLK_FREQ_MIN ( 600.000000 ),
.CLKIN_FREQ_MAX ( 700.000000 ),
.CLKIN_FREQ_MIN ( 10.000000 ),
.CLKPFD_FREQ_MAX ( 450.000000 ),
.CLKPFD_FREQ_MIN ( 10.000000 ))
i_MMCM_ADV (
.CLKFBIN(CLKFBIN),
.PSCLK(GND),
.PWRDWN(\i_MMCM_ADV/PWRDWN_INT ),
.DCLK(GND),
.DEN(GND),
.CLKINSEL(\i_MMCM_ADV/CLKINSEL_INT ),
.CLKIN2(GND),
.RST(\i_MMCM_ADV/RST_INT ),
.PSINCDEC(\i_MMCM_ADV/PSINCDEC_INT ),
.DWE(GND),
.PSEN(\i_MMCM_ADV/PSEN_INT ),
.CLKIN1(clk_IBUF_2571),
.CLKOUT3(CLKOUT3),
.CLKOUT3B(\i_MMCM_ADV/CLKOUT3B ),
.CLKFBOUT(CLKFBOUT),
.CLKFBSTOPPED(\i_MMCM_ADV/CLKFBSTOPPED ),
.CLKFBOUTB(\i_MMCM_ADV/CLKFBOUTB ),
.CLKOUT1(CLKOUT1),
.CLKOUT5(CLKOUT5),
.DRDY(\i_MMCM_ADV/DRDY ),
.CLKOUT0(clk_out0_OBUF_2333),
.CLKOUT4(CLKOUT4),
.CLKOUT1B(\i_MMCM_ADV/CLKOUT1B ),
.CLKINSTOPPED(\i_MMCM_ADV/CLKINSTOPPED ),
.CLKOUT0B(\i_MMCM_ADV/CLKOUT0B ),
.CLKOUT2(CLKOUT2),
.CLKOUT2B(\i_MMCM_ADV/CLKOUT2B ),
.PSDONE(\i_MMCM_ADV/PSDONE ),
.CLKOUT6(CLKOUT6),
.LOCKED(LOCKED_OBUF_2386),
.DI({GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND, GND}),
.DADDR({GND, GND, GND, GND, GND, GND, GND}),
.DO({\i_MMCM_ADV/DO15 , \i_MMCM_ADV/DO14 , \i_MMCM_ADV/DO13 , \i_MMCM_ADV/DO12 , \i_MMCM_ADV/DO11 , \i_MMCM_ADV/DO10 , \i_MMCM_ADV/DO9 ,
\i_MMCM_ADV/DO8 , \i_MMCM_ADV/DO7 , \i_MMCM_ADV/DO6 , \i_MMCM_ADV/DO5 , \i_MMCM_ADV/DO4 , \i_MMCM_ADV/DO3 , \i_MMCM_ADV/DO2 , \i_MMCM_ADV/DO1 ,
\i_MMCM_ADV/DO0 })
);