nuliknol

Hi, I am writing my own OS for 64bit processors and I am stuck with the problem of general protection. My OS will not rely on page fault to implement user space protection mechanism, so I found there is a way to do it with segment limit checking: This presentation …

Hi, is there a way to do 128 bit comparison in one instruction with SSE 4.2a? I need to compare if the XMM0 register is 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF If not, what would be the fastest way to compare with two steps of 64bit comparisions? Thanks in advance.

Hi, I am looking for instruction cost list, in clock cycles, for ia-32 intel architecture, something like this: movdqa <-- 3 clock cycles mov <-- 1 clock cycle jmp <-- 1 clock cycle Is this info available somewhere? I checked the manuals, didn't find it. Will appreciate any help Thanks!

Hi, i have got a new question, is it possible to pop from the FPU stack and deposit to general purpose register without doing FIST to memory? Or in other words,, is there any way to do FISTP RAX or something equivalent? (i can't write to memory because of low …

Hi, how many 64 bit registers can I use inside intel i7 cpu for storage purposes to feed them later into XMM registers? I currently use XMM0-15, MM0-8, R8-15 only. I know i can use RAX,RBX,RCX, RDX and eight registers inside the FPU (ST0-ST8), but what others can I use? …

Hi, i have been looking for this and can't find anywhere about the subject. I would like to know how many clock cycles does it takes to execute each instruction in complete asm instruction set for Intel i7 microprocessor. (including SSE & FPU instructions). Does any one has a list …