Refresher

[freesoft_2000]

Hi everyone,

I have some rather ridicalous questions so bear with me for a while.

The last time i did overclocking was five years ago was when overclocking was simply configuring the jumpers on the motherboard and had nothing to do with the bios. Well now they all have to do with bioses for overclocking.

Here is my question for example for a 3.2Ghz intel pentium 4 chip with fsb 800mhz the fsb parameter in the bios is set to 200mhz thus using the below formula

200mhz times multiplier = cpu speed

If i were to use a 1.8Ghz amd chip with the fsb of the chip 266mhz the fsb parameter in the bios is set to 133mhz thus using the below formula

133mhz times multiplier = cpu speed

Basically my question is why is that for the intel chip to be rightfully configured the internal bus speed of the intel chip has to be divided by 4 and that of amd has to be divided by 2. Why is this so or am i missing something.

A detailed explanation would really be helpful

Any help is greatly appreciated

Thank You

Yours Sincerely

Richard West

[Catweazle]

It's because you have a bus SPEED and a bus CLOCK which are serately describable things.

The bus CLOCK of the two chips are 200MHz and 133 MHz respectively, and the architectures of the two chips mean that 4 'bits' of data and 2 'bits' of data are concurrently handled in each read or write, to effectively give a bus SPEED of 800 MHz and 266 MHz respectively.

By the way, not all 1.8 GHz AMD chips use that bus clock and bus speed.

[freesoft_2000]

Hi everyone,

The 4 bits for intel and the 2 bit for amd, is it a fixed thing for their architecture or is it something variable for their architecture.

Do the above companies still use the same read/write architectures of 4 bits for intel and 2 bits for amd for their new 64 bit chips?

Where did you get the 4 bit and 2 bit information from, i could not seem to find it on intel's or amd's website.

Is possible for you to point me to the right direction if it is of no inconvinience to you?

Thank you

Yours Sincerely

Richard West

[Catweazle]

Here's a reasonably good article you could read. I very much oversimplified it with my previous comment. The Athlon64 works differently again, because it doesn't really use a front side bus in the way earlier chips do. You still use clocks and multipliers with them, but they don't really connect via a front side bus because the memory controller itself is on the chip.

I personally pull that sort of stuff straight out of my head. Writing about IT technology is my line of work :)

http://www.directron.com/fsbguide.html

[freesoft_2000]

Hi everyone,

Thanks to you, i now understand the fsb and thanks for the article.

You did say that the athlon64 does not use the fsb. Could you explain how the athlon 64 bit chips works without connecting to the fsb?

Richard West

[Catweazle]

It's not truly a front side bus because, in theory, the Athlon 64 processor can communicate with system RAM at the full speed of the processor, as the memory controller is on the processor itself.

With other processors, the front side bus was used because processors operate at higher speeds than RAM. It's like a corridor joining two large rooms, and even if you open the doors wider you can still never push more through it than it's width will allow.

With the onboard memory controller of the Athlon 64, although clockspeed and divisors are still being used they don't adjust how wide the 'doors' are opened. It's the 'corridor' itself which is being widened when adjustments are made, and if RAM fast enough can be obtained it can be as wide as those large 'rooms' themselves.

So for other processors front side bus is effectively and potentially a 'bottleneck' because even if RAM can run at the high speeds of processors, front side bus chokes off data transfer. For the Athlon 64 no such restriction exists, and if RAM speeds increase the extra data transfer bandwidth potentially available can be used.

[freesoft_2000]

Hi everyone,

Catweazle, to calculate the bus clock of intel celeron proceesors do i divide the effective bus speed by 4 as well?

Do intel celeron processors also use 4 bits for read and write
functions?

Thank You

Yours Sincerely

Richard West

[Catweazle]

I'm pretty sure the later model Celerons also have a fsb speed which is 4 times the fsb clockspeed.

These things don't 'use' 4 bits, by the way. They transfer 4 bits per clock cycle. We're talking about the way these processors transfer data in relation to the bus clock. The Athlon XP uses what we call 'double-pumping'. The Pentium 4 series uses what we call 'quad-pumping'.

[freesoft_2000]

Hi everyone,

Sorry to revivie this old topic.

You see in the below article

http://www.directron.com/fsbguide.html

This is how they calculated the system clock

800MHz (AMD64): 200MHz clock
1066MHz (Pentium 4/LGA775): 266MHz clock

It seems that both of them are also divided 4, i thought that usually because AMD does only double pumping, thus it should only be divided by 2 or have i misunderstood it somehow?

Also if using AMD sempron, it's architecture which i assume is also double pumping that means that i divide by 2 and not 4. Am i right or have i misunderstood that also?

Any help is greatly appreciated

Thank You

Yours Sincerely

Richard West