Hi, I want to create multiple executables corresponding to their .c files in one target rule. For example, I have prog1.c and pro2.c, how do I create the executables prog1 and prog2 from just one target?
By target I mean something like this
test: dependencies
[tab] command rules

Thanks in advance!

Do you just mean something like this?

test: [i]dependencies[/i]
	gcc prog1.c -o prog1
	gcc prog2.c -o prog2

Sorry, i mean just one rule
test: dependencies
[tab] only one rule here

I googled, but can't really find any info.... is it possible at all?

thanx for your reply, but this seems pretty "manuel", if i got 1000 files, I will have to type all 1000 files .... is there a way that i can use the automatic variables to build all the executables?

how about,

EXECUTABLES = test1 test2
SOURCES = ${EXECUTABLES:=.cpp}

all: ${EXECUTABLES}

${EXECUTABLES}: ${SOURCES}
        g++ $@.cpp -o $@

You should try this:
CC= whathever gcc
LDFLAGS= whathever ldflags
etc...

SOURCES=$(wildcard *.c)
EXECUTABLES=$(SOURCES:%.c=%)
all: $(EXECUTABLES)
echo "Done"
clean:
rm -f $(EXECUTABLES)

That should work, because the rule

all: $(EXECUTABLES)

is expanded and $(EXECUTABLES) references to all the executable files (to be created!). Also make knows the default rule for a c file: compile and create executables!.

Regards,
Erwin.

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