Can anyone please suggest or guide me to complete this project as I am newly learning the assembly code.
Our objective is the design of a pipelined processor capable of running an assembly-language program on the basis of a subset of the MIPS64 instruction set. The subset consisting of 44 instructions is given by
AND ANDI
BAL BEQ BGEZ BGEZAL BGTZ
BLEZ BLTZ BLTZL BNE
DADD DADDI DADDIU DADDU DDIV
DDIVU DMUL DROTR DROTRV DSLLV
DSRA DSUB
J JALR JR
LB LD LW
MFHI MFLO MOVN MOVZ
NOP NOR
OR ORI
SB SD SW SLT SLTI
XOR XORI.
Using the approach given in the past three lectures and in consultation with the MIPS instruction set manual posted in the NYIT Blackboard, write the integrated micro-operations of the above 44-computer instructions in the IF stage. Repeat for the ID stage, EX stage, MEM stage, and WB stage.