I have to do a group report about the Transmeta Efficeon Processor, and I chose to cover aspects about the instructions that it impliments. The report has to cover certain things, and I am having difficulty find information about "instruction fetch and execution cycles and timing (including details of pipelining, if applicable);" Could someone help me out with this?
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Jump to PostI hope you ill find what you need here. The first two are PDF documents.
Then there is this review:
Jump to PostTransmeta processors have a different architecture to yourMove typical processors, so it may help to know what it is you want to do. But, that said, there's no obligation.
Here's another helpful guide that may come in useful somewhere down the line in your project.
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