I've been following a few tutorials to create Makefiles and came across one at http://www.cs.colby.edu/maxwell/courses/tutorials/maketutor/ which I managed to get working across some simple functions and programs:
IDIR = include CC=g++ CFLAGS=-I$(IDIR) ODIR=obj _DEPS = hellomake.hpp DEPS = $(patsubst %,$(IDIR)/%,$(_DEPS)) _OBJ = hellomake.o hellofunc.o OBJ = $(patsubst %,$(ODIR)/%,$(_OBJ)) $(ODIR)/%.o: %.cpp $(DEPS) $(CC) -c -o $@ $< $(CFLAGS) hellomake: $(OBJ) $(CC) -o $@ $^ $(CFLAGS) .PHONY: clean clean: rm -f $(ODIR)/*.o *~ core $(INCDIR)/*~
My question is this: is there a way for a Makefile to automatically generate _DEPS and _OBJ in the above example by scanning the contents of include and src respectively? e.g. _DEPS = function(contents of include), _OBJ = function(contents of src (not main.cpp ) with .cpp replaced by .o). I read somewhere about using
OBJ = $(SRC:.cpp = .o)
to generate a list with the same name but different filetype but am temporarily stuck.
Thanks in advance for any help/tips/pointers