I have a question about the assembly code generated by this small patch of C code that I wrote. The code patch is shown below, basically what I am doing is reading floating point values in from a hardware updated register and performing the arctan2f function on those values.

#include "stdlib.h"
#include "stdbool.h"
#include "string.h"
#include "math.h"
#include <stdarg.h>
#include "GLOBAL.H"

#define   rs232_uart2_fp    (*((volatile   float *) 0x2C040002))    
#define   quik_silva_reg_fp (*((volatile   float *) 0x8C040000))

int main (void) 

float temp;
float ax, ay;

quik_silva_reg = 0;


while  ( 1 ) {

    ax = rs232_uart2_fp;
    ay = rs232_uart2_fp;

    quik_silva_reg = 0;
    quik_silva_reg_fp = atan2f(ay, ax);

  return 0;


OK so the code is not working and I have no idea why. I took a look at the disassemble list and I found something which looks very strange to me. The compiler places the two floating point variables x and y in floating point registers $f12, and $f13 and then calls the atan2f function as shown below.

Now here is the weird part, when I look through the atan2f code I see ABSOLUTELY NO mention of floating point register $f13. Am I missing something here??? I do see a reference for a mfc1 for floating point register $f14 but no mention of register $f13 which is the register which holds the x operand for the atan2f(y,x) function. I attached the entire dissemble list for you to have a look for yourself.

Here are my command line and options.

mips-sde-elf-gcc -Os -msingle-float -fsingle-precision-constant -g -mno-memcpy -mno-branch-likely -mno-check-zero-division -m abi=32 -mfp32 -mno-paired-single -mips32r2 -mno-fp-exceptions -mtune=r3k -T elf32btsmip.xc startup.o atan2_test.cpp -o uPC0_Spr6.elf -lc -lm

Thanks in advance for your help! I really need it!!!!!

0000026c <atan2f>:
 26c:   27bdffe8    addiu   sp,sp,-24
 270:   afbf0014    sw  ra,20(sp)
 274:   0c0000a2    jal 288 <__ieee754_atan2f>
 278:   00000000    nop
 27c:   8fbf0014    lw  ra,20(sp)
 280:   03e00008    jr  ra
 284:   27bd0018    addiu   sp,sp,24

00000288 <__ieee754_atan2f>:
 288:   44047000    mfc1    a0,$f14
 28c:   3c087f80    lui t0,0x7f80
 290:   00803021    move    a2,a0
 294:   7cc3f000    ext v1,a2,0x0,0x1f
 298:   25090001    addiu   t1,t0,1
 29c:   27bdffe8    addiu   sp,sp,-24
 2a0:   0069282a    slt a1,v1,t1
 2a4:   afbf0014    sw  ra,20(sp)
 2a8:   afb00010    sw  s0,16(sp)
 2ac:   10a00006    beqz    a1,2c8 <__ieee754_atan2f+0x40>
 2b0:   44026000    mfc1    v0,$f12
 2b4:   00403821    move    a3,v0
 2b8:   7ce5f000    ext a1,a3,0x0,0x1f
 2bc:   00a9482a    slt t1,a1,t1
 2c0:   15200005    bnez    t1,2d8 <__ieee754_atan2f+0x50>
 2c4:   3c093f80    lui t1,0x3f80
 2c8:   44820000    mtc1    v0,$f0
 2cc:   44840800    mtc1    a0,$f1
 2d0:   080000ba    j   2e8 <__ieee754_atan2f+0x60>
 2d4:   46010000    add.s   $f0,$f0,$f1
 2d8:   14c90005    bne a2,t1,2f0 <__ieee754_atan2f+0x68>
 2dc:   00068783    sra s0,a2,0x1e
 2e0:   0c000129    jal 4a4 <atanf>
 2e4:   00000000    nop
 2e8:   08000124    j   490 <__ieee754_atan2f+0x208>
 2ec:   44020000    mfc1    v0,$f0
 2f0:   32100002    andi    s0,s0,0x2
 2f4:   00074fc2    srl t1,a3,0x1f
 2f8:   14a00008    bnez    a1,31c <__ieee754_atan2f+0x94>
 2fc:   02098025    or  s0,s0,t1
 300:   24030002    li  v1,2
 304:   12030024    beq s0,v1,398 <__ieee754_atan2f+0x110>
 308:   24030003    li  v1,3
 30c:   16030061    bne s0,v1,494 <__ieee754_atan2f+0x20c>
 310:   8fbf0014    lw  ra,20(sp)
 314:   080000e9    j   3a4 <__ieee754_atan2f+0x11c>
 318:   3c020001    lui v0,0x1
 31c:   10600025    beqz    v1,3b4 <__ieee754_atan2f+0x12c>
 320:   00000000    nop
 324:   14680021    bne v1,t0,3ac <__ieee754_atan2f+0x124>
 328:   00000000    nop
 32c:   14a30010    bne a1,v1,370 <__ieee754_atan2f+0xe8>
 330:   24020002    li  v0,2
 334:   1202000a    beq s0,v0,360 <__ieee754_atan2f+0xd8>
 338:   3c020001    lui v0,0x1
 33c:   24020003    li  v0,3
 340:   12020009    beq s0,v0,368 <__ieee754_atan2f+0xe0>
 344:   3c020001    lui v0,0x1
 348:   24020001    li  v0,1
 34c:   5202004b    beql    s0,v0,47c <__ieee754_atan2f+0x1f4>
 350:   3c020001    lui v0,0x1
 354:   3c020001    lui v0,0x1
 358:   08000124    j   490 <__ieee754_atan2f+0x208>
 35c:   8c42a02c    lw  v0,-24532(v0)
 360:   08000124    j   490 <__ieee754_atan2f+0x208>
 364:   8c42a034    lw  v0,-24524(v0)
 368:   08000124    j   490 <__ieee754_atan2f+0x208>
 36c:   8c42a038    lw  v0,-24520(v0)
 370:   1202000a    beq s0,v0,39c <__ieee754_atan2f+0x114>
 374:   3c020001    lui v0,0x1
 378:   24020003    li  v0,3
 37c:   12020009    beq s0,v0,3a4 <__ieee754_atan2f+0x11c>
 380:   3c020001    lui v0,0x1
 384:   24020001    li  v0,1
 388:   5202003e    beql    s0,v0,484 <__ieee754_atan2f+0x1fc>
 38c:   3c020001    lui v0,0x1
 390:   08000124    j   490 <__ieee754_atan2f+0x208>
 394:   00001021    move    v0,zero
 398:   3c020001    lui v0,0x1
 39c:   08000124    j   490 <__ieee754_atan2f+0x208>
 3a0:   8c42a024    lw  v0,-24540(v0)
 3a4:   08000124    j   490 <__ieee754_atan2f+0x208>
 3a8:   8c42a028    lw  v0,-24536(v0)
 3ac:   54a80006    bnel    a1,t0,3c8 <__ieee754_atan2f+0x140>
 3b0:   00a31823    subu    v1,a1,v1
 3b4:   04e30035    bgezl   a3,48c <__ieee754_atan2f+0x204>
 3b8:   3c020001    lui v0,0x1
 3bc:   3c020001    lui v0,0x1
 3c0:   08000124    j   490 <__ieee754_atan2f+0x208>
 3c4:   8c42a040    lw  v0,-24512(v0)
 3c8:   00031dc3    sra v1,v1,0x17
 3cc:   2865003d    slti    a1,v1,61
 3d0:   50a0000e    beqzl   a1,40c <__ieee754_atan2f+0x184>
 3d4:   3c020001    lui v0,0x1
 3d8:   04c10005    bgez    a2,3f0 <__ieee754_atan2f+0x168>
 3dc:   44820000    mtc1    v0,$f0
 3e0:   2865ffc4    slti    a1,v1,-60
 3e4:   14a0000a    bnez    a1,410 <__ieee754_atan2f+0x188>
 3e8:   00001821    move    v1,zero
 3ec:   44820000    mtc1    v0,$f0
 3f0:   44840800    mtc1    a0,$f1
 3f4:   0c0001c2    jal 708 <fabsf>
 3f8:   46010303    div.s   $f12,$f0,$f1
 3fc:   0c000129    jal 4a4 <atanf>
 400:   46000306    mov.s   $f12,$f0
 404:   08000104    j   410 <__ieee754_atan2f+0x188>
 408:   44030000    mfc1    v1,$f0
 40c:   8c43a020    lw  v1,-24544(v0)
 410:   24020001    li  v0,1
 414:   12020008    beq s0,v0,438 <__ieee754_atan2f+0x1b0>
 418:   3c028000    lui v0,0x8000
 41c:   24020002    li  v0,2
 420:   52020007    beql    s0,v0,440 <__ieee754_atan2f+0x1b8>
 424:   3c020001    lui v0,0x1
 428:   12000019    beqz    s0,490 <__ieee754_atan2f+0x208>
 42c:   00601021    move    v0,v1
 430:   08000118    j   460 <__ieee754_atan2f+0x1d8>
 434:   3c030001    lui v1,0x1
 438:   08000124    j   490 <__ieee754_atan2f+0x208>
 43c:   00431026    xor v0,v0,v1
 440:   c440a044    lwc1    $f0,-24508(v0)
 444:   44830800    mtc1    v1,$f1
 448:   3c020001    lui v0,0x1
 44c:   46000800    add.s   $f0,$f1,$f0
 450:   c441a024    lwc1    $f1,-24540(v0)
 454:   46000841    sub.s   $f1,$f1,$f0
 458:   08000124    j   490 <__ieee754_atan2f+0x208>
 45c:   44020800    mfc1    v0,$f1
 460:   c461a044    lwc1    $f1,-24508(v1)
 464:   44820000    mtc1    v0,$f0
 468:   3c020001    lui v0,0x1
 46c:   46010040    add.s   $f1,$f0,$f1
 470:   c440a024    lwc1    $f0,-24540(v0)
 474:   080000ba    j   2e8 <__ieee754_atan2f+0x60>
 478:   46000801    sub.s   $f0,$f1,$f0
 47c:   08000124    j   490 <__ieee754_atan2f+0x208>
 480:   8c42a030    lw  v0,-24528(v0)
 484:   08000124    j   490 <__ieee754_atan2f+0x208>
 488:   8c42a03c    lw  v0,-24516(v0)
 48c:   8c42a020    lw  v0,-24544(v0)
 490:   8fbf0014    lw  ra,20(sp)
 494:   44820000    mtc1    v0,$f0
 498:   8fb00010    lw  s0,16(sp)
 49c:   03e00008    jr  ra
 4a0:   27bd0018    addiu   sp,sp,24

000004a4 <atanf>:
 4a4:   44026000    mfc1    v0,$f12
 4a8:   27bdffe0    addiu   sp,sp,-32
 4ac:   afb10018    sw  s1,24(sp)
 4b0:   00408821    move    s1,v0
 4b4:   afb00014    sw  s0,20(sp)
 4b8:   3c035080    lui v1,0x5080
 4bc:   7e30f000    ext s0,s1,0x0,0x1f
 4c0:   0203182a    slt v1,s0,v1
 4c4:   1460000d    bnez    v1,4fc <atanf+0x58>
 4c8:   afbf001c    sw  ra,28(sp)
 4cc:   3c037f80    lui v1,0x7f80
 4d0:   24630001    addiu   v1,v1,1
 4d4:   0203802a    slt s0,s0,v1
 4d8:   16000004    bnez    s0,4ec <atanf+0x48>
 4dc:   00000000    nop
 4e0:   460c6000    add.s   $f0,$f12,$f12
 4e4:   080001bc    j   6f0 <atanf+0x24c>
 4e8:   44020000    mfc1    v0,$f0
 4ec:   1a20007e    blez    s1,6e8 <atanf+0x244>
 4f0:   3c020001    lui v0,0x1
 4f4:   080001bc    j   6f0 <atanf+0x24c>
 4f8:   8c42a020    lw  v0,-24544(v0)
 4fc:   3c033ee0    lui v1,0x3ee0
 500:   0203182a    slt v1,s0,v1
 504:   1060000e    beqz    v1,540 <atanf+0x9c>
 508:   3c033100    lui v1,0x3100
 50c:   0203802a    slt s0,s0,v1
 510:   12000037    beqz    s0,5f0 <atanf+0x14c>
 514:   2403ffff    li  v1,-1
 518:   3c040001    lui a0,0x1
 51c:   c481a048    lwc1    $f1,-24504(a0)
 520:   3c040001    lui a0,0x1
 524:   c480a04c    lwc1    $f0,-24500(a0)
 528:   46016040    add.s   $f1,$f12,$f1
 52c:   4601003c    c.lt.s  $f0,$f1
 530:   45000030    bc1f    5f4 <atanf+0x150>
 534:   44820000    mtc1    v0,$f0
 538:   080001be    j   6f8 <atanf+0x254>
 53c:   8fbf001c    lw  ra,28(sp)
 540:   0c0001c2    jal 708 <fabsf>
 544:   00000000    nop
 548:   3c023f98    lui v0,0x3f98
 54c:   0202102a    slt v0,s0,v0
 550:   50400016    beqzl   v0,5ac <atanf+0x108>
 554:   3c02401c    lui v0,0x401c
 558:   3c023f30    lui v0,0x3f30
 55c:   0202802a    slt s0,s0,v0
 560:   1200000b    beqz    s0,590 <atanf+0xec>
 564:   3c020001    lui v0,0x1
 568:   46000080    add.s   $f2,$f0,$f0
 56c:   c441a04c    lwc1    $f1,-24500(v0)
 570:   3c020001    lui v0,0x1
 574:   00001821    move    v1,zero
 578:   46011041    sub.s   $f1,$f2,$f1
 57c:   c442a050    lwc1    $f2,-24496(v0)
 580:   46020000    add.s   $f0,$f0,$f2
 584:   46000803    div.s   $f0,$f1,$f0
 588:   0800017c    j   5f0 <atanf+0x14c>
 58c:   44020000    mfc1    v0,$f0
 590:   c441a04c    lwc1    $f1,-24500(v0)
 594:   24030001    li  v1,1
 598:   46010081    sub.s   $f2,$f0,$f1
 59c:   46010000    add.s   $f0,$f0,$f1
 5a0:   46001003    div.s   $f0,$f2,$f0
 5a4:   0800017c    j   5f0 <atanf+0x14c>
 5a8:   44020000    mfc1    v0,$f0
 5ac:   0202802a    slt s0,s0,v0
 5b0:   5200000b    beqzl   s0,5e0 <atanf+0x13c>
 5b4:   3c020001    lui v0,0x1
 5b8:   3c020001    lui v0,0x1
 5bc:   c441a054    lwc1    $f1,-24492(v0)
 5c0:   3c020001    lui v0,0x1
 5c4:   c443a04c    lwc1    $f3,-24500(v0)
 5c8:   46010081    sub.s   $f2,$f0,$f1
 5cc:   24030002    li  v1,2
 5d0:   4c610020    madd.s  $f0,$f3,$f0,$f1
 5d4:   46001003    div.s   $f0,$f2,$f0
 5d8:   0800017c    j   5f0 <atanf+0x14c>
 5dc:   44020000    mfc1    v0,$f0
 5e0:   c441a058    lwc1    $f1,-24488(v0)
 5e4:   24030003    li  v1,3
 5e8:   46000843    div.s   $f1,$f1,$f0
 5ec:   44020800    mfc1    v0,$f1
 5f0:   44820000    mtc1    v0,$f0
 5f4:   3c040001    lui a0,0x1
 5f8:   46000042    mul.s   $f1,$f0,$f0
 5fc:   c482a060    lwc1    $f2,-24480(a0)
 600:   3c040001    lui a0,0x1
 604:   c483a05c    lwc1    $f3,-24484(a0)
 608:   3c040001    lui a0,0x1
 60c:   46010802    mul.s   $f0,$f1,$f1
 610:   4c4300a0    madd.s  $f2,$f2,$f0,$f3
 614:   c483a064    lwc1    $f3,-24476(a0)
 618:   3c040001    lui a0,0x1
 61c:   4c6200a0    madd.s  $f2,$f3,$f0,$f2
 620:   c483a068    lwc1    $f3,-24472(a0)
 624:   3c040001    lui a0,0x1
 628:   4c6200a0    madd.s  $f2,$f3,$f0,$f2
 62c:   c483a06c    lwc1    $f3,-24468(a0)
 630:   3c040001    lui a0,0x1
 634:   4c6200a0    madd.s  $f2,$f3,$f0,$f2
 638:   c483a070    lwc1    $f3,-24464(a0)
 63c:   3c040001    lui a0,0x1
 640:   4c6200a0    madd.s  $f2,$f3,$f0,$f2
 644:   46020842    mul.s   $f1,$f1,$f2
 648:   c482a078    lwc1    $f2,-24456(a0)
 64c:   3c040001    lui a0,0x1
 650:   c483a074    lwc1    $f3,-24460(a0)
 654:   3c040001    lui a0,0x1
 658:   4c4300a8    msub.s  $f2,$f2,$f0,$f3
 65c:   c483a07c    lwc1    $f3,-24452(a0)
 660:   3c040001    lui a0,0x1
 664:   4c6200a8    msub.s  $f2,$f3,$f0,$f2
 668:   c483a080    lwc1    $f3,-24448(a0)
 66c:   3c040001    lui a0,0x1
 670:   4c6200a8    msub.s  $f2,$f3,$f0,$f2
 674:   c483a084    lwc1    $f3,-24444(a0)
 678:   2404ffff    li  a0,-1
 67c:   4c6200a8    msub.s  $f2,$f3,$f0,$f2
 680:   14640008    bne v1,a0,6a4 <atanf+0x200>
 684:   46020002    mul.s   $f0,$f0,$f2
 688:   46000800    add.s   $f0,$f1,$f0
 68c:   44820800    mtc1    v0,$f1
 690:   44821000    mtc1    v0,$f2
 694:   46000802    mul.s   $f0,$f1,$f0
 698:   46001081    sub.s   $f2,$f2,$f0
 69c:   080001bc    j   6f0 <atanf+0x24c>
 6a0:   44021000    mfc1    v0,$f2
 6a4:   3c040001    lui a0,0x1
 6a8:   00031880    sll v1,v1,0x2
 6ac:   46000800    add.s   $f0,$f1,$f0
 6b0:   2484a010    addiu   a0,a0,-24560
 6b4:   4c640080    lwxc1   $f2,a0(v1)
 6b8:   44820800    mtc1    v0,$f1
 6bc:   3c020001    lui v0,0x1
 6c0:   4c400828    msub.s  $f0,$f2,$f1,$f0
 6c4:   2442a000    addiu   v0,v0,-24576
 6c8:   46010001    sub.s   $f0,$f0,$f1
 6cc:   4c620040    lwxc1   $f1,v0(v1)
 6d0:   46000841    sub.s   $f1,$f1,$f0
 6d4:   06210006    bgez    s1,6f0 <atanf+0x24c>
 6d8:   44020800    mfc1    v0,$f1
 6dc:   3c038000    lui v1,0x8000
 6e0:   080001bc    j   6f0 <atanf+0x24c>
 6e4:   00621026    xor v0,v1,v0
 6e8:   3c020001    lui v0,0x1
 6ec:   8c42a040    lw  v0,-24512(v0)
 6f0:   8fbf001c    lw  ra,28(sp)
 6f4:   44820000    mtc1    v0,$f0
 6f8:   8fb10018    lw  s1,24(sp)
 6fc:   8fb00014    lw  s0,20(sp)
 700:   03e00008    jr  ra
 704:   27bd0020    addiu   sp,sp,32

00000708 <fabsf>:
 708:   44026000    mfc1    v0,$f12
 70c:   7c42f000    ext v0,v0,0x0,0x1f
 710:   03e00008    jr  ra
 714:   44820000    mtc1    v0,$f0

00000718 <__do_global_ctors_aux>:
 718:   27bdffe0    addiu   sp,sp,-32
 71c:   afb00014    sw  s0,20(sp)
 720:   3c100001    lui s0,0x1
 724:   afb10018    sw  s1,24(sp)
 728:   afbf001c    sw  ra,28(sp)
 72c:   2610a0bc    addiu   s0,s0,-24388
 730:   080001d0    j   740 <__do_global_ctors_aux+0x28>
 734:   2411ffff    li  s1,-1
 738:   0040f809    jalr    v0
 73c:   2610fffc    addiu   s0,s0,-4
 740:   8e020000    lw  v0,0(s0)
 744:   1451fffc    bne v0,s1,738 <__do_global_ctors_aux+0x20>
 748:   8fbf001c    lw  ra,28(sp)
 74c:   8fb10018    lw  s1,24(sp)
 750:   8fb00014    lw  s0,20(sp)
 754:   03e00008    jr  ra
 758:   27bd0020    addiu   sp,sp,32

Disassembly of section .init:

0000075c <_init>:
 75c:   27bdffe0    addiu   sp,sp,-32
 760:   afbf0014    sw  ra,20(sp)
 764:   0c000074    jal 1d0 <frame_dummy>
 768:   00000000    nop
 76c:   0c0001c6    jal 718 <__do_global_ctors_aux>
 770:   00000000    nop

00000774 <init>:
 774:   8fbf0014    lw  ra,20(sp)
 778:   03e00008    jr  ra
 77c:   27bd0020    addiu   sp,sp,32

Disassembly of section .fini:

00000780 <_fini>:
 780:   27bdffe0    addiu   sp,sp,-32
 784:   afbf0014    sw  ra,20(sp)
 788:   0c000048    jal 120 <__do_global_dtors_aux>
 78c:   00000000    nop

00000790 <fini>:
 790:   8fbf0014    lw  ra,20(sp)
 794:   03e00008    jr  ra
 798:   27bd0020    addiu   sp,sp,32

    while  ( 1 ) {

    ax = rs232_uart2_fp;
 24c:   c62d0002    lwc1    $f13,2(s1)
    ay = rs232_uart2_fp;
 250:   c62c0002    lwc1    $f12,2(s1)
    quik_silva_reg = 0;
 254:   ae000000    sw  zero,0(s0)
    quik_silva_reg_fp = atan2f(ay, ax);
 258:   0c00009b    jal 26c <atan2f>
 25c:   00000000    nop
 260:   e6000000    swc1    $f0,0(s0)
 264:   08000093    j   24c <main+0x20>
 268:   00000000    nop

Edited 1 Year Ago by asic_designer

So, your 33 lines of C code generates 383 lines of assembler. And you expect us (most of us have day jobs) to analyze it? You set both ax and ay to the same value, and then call the atan2f() function with both variables. If atan2f() is a system library function, then you won't see the assembler code for it since it is already binary - just the function calls you observe.

In addition, you do nothing with the return values, such as printing them out. How do you know you aren't getting valid results?

Edited 1 Year Ago by rubberman


If you don't want to help or don't have time to help that is perfectly fine. Please don't de-rail my post with insults, I do this (ASIC Design) for a living also, this isn't a homework assignement. I just added in the full assembly code incase someone wanted to take a look.

Now to address your comments directly, both parameters x and y come from a "volatile" variable which represents a hardware register. I believe I stated that in the orginal post, so "no" the parameters x and y are not the same value. Also I do "do" something with the result, I assign it to another "volatile" variable which also represents a hardware register. Soooo, no the values and variables should not have been optimized away by the compiler.

I know I must being something wrong, thats why I come here to the experts, I know your time is valuable, and I thank you for your help!

      while  ( 1 ) {
    ax = rs232_uart2_fp;
 24c:   c62d0002    lwc1    $f13,2(s1)
    ay = rs232_uart2_fp;
 250:   c62c0002    lwc1    $f12,2(s1)
    quik_silva_reg = 0;
 254:   ae000000    sw  zero,0(s0)
    quik_silva_reg_fp = atan2f(ay, ax);
 258:   0c00009b    jal 26c <atan2f>
 25c:   00000000    nop
 260:   e6000000    swc1    $f0,0(s0)
 264:   08000093    j   24c <main+0x20>
 268:   00000000    nop
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