Hello everyone. I am currently studying programming and am really confused when I come to this level. It is to link object files together using a "makefile". I just wanted to know if I am correct in my understanding so far. If I am wrong in my conclusions please cite me at where I am wrong.

I created a windows program using "Bloodshed DevC++" and it comes with MingW32 library and a GNU make program (I'm assuming on this). The headers I have created for a complex windows program are "Engine.h" and "EngineMain.h". "Engine.h" which contains the class, prototypes, and global variables. "EngineMain.h" which contains the includes to "Engine.h", "Windowsx.h" and to "Windows.h".

To my understanding a "makefile" is a text file with the extension ".mak" or ".mk" generated by using the "edit" program in command prompt. From my resources, if anyone uses Blodshed DevC++, I am suppose to tell the compiler to use my custom "makefile" under "Project Option->Makefile tab". And under the "Program Option->Parameter tab" type the command "--file=Makefile.mak" in the linker box. Am I correct in this procedure?

Please Note that the word "tab" enclosed in paranthesis indicate that they are tab characters in the text file as per "makefile" rule.

My "Makefile" contains this:

EngineMain : EngineMain.o Engine.o
                   (tab)gcc -o EngineMain.o Engine.o
         EngineMain.o : EngineMain.cpp Engine.h
                   (tab)gcc -c -g EngineMain.cpp
         Engine.o : Engine.cpp Engine.h
                   (tab)gcc -c -g Engine.cpp

Thanks in advance and be praised your extremely good fortunes.

Haven't used Bloodshed, but procedure seems fine. Usually IDEs would give you an option to specify a custom makefile.
Just one comment on the makefile contents:
second line should be something like:
(tab)gcc -o EngineMain EngineMain.o Engine.o

oh and one small point makefiles don't end in mk or mak. They usaullyhave no ending and are almost exclusively called Makefile.

I know this post is old, but in case future people are wondering......

The GNU make utility looks for only these file names in order "GNUmakefile" ,"makefile","Makefile"...... but for the most part never use the first one.... there are other make utilities and they only look for the latter two.

For people looking for a good book on make check out "GNU Make: A Program for Directed Compilation" by Richard Stallman and Roland McGrath(both GNU experts) or check out the GNU website.. http://www.gnu.org/software/make/

My "Makefile" contains this:

EngineMain : EngineMain.o Engine.o
                   (tab)gcc -o EngineMain.o Engine.o
         EngineMain.o : EngineMain.cpp Engine.h
                   (tab)gcc -c -g EngineMain.cpp
         Engine.o : Engine.cpp Engine.h
                   (tab)gcc -c -g Engine.cpp

The rule above for EngineMain will not function as intended. It should probably be;

EngineMain : EngineMain.o Engine.o
                   (tab)gcc -o EngineMain EngineMain.o Engine.o

oh and one small point makefiles don't end in mk or mak. They usaullyhave no ending and are almost exclusively called Makefile.

Several make utilities accept .mk or .mak extensions (eg Microsoft's nmake, Borland's make utility).

The GNU make utility looks for only these file names in order "GNUmakefile" ,"makefile","Makefile"...... but for the most part never use the first one.... there are other make utilities and they only look for the latter two.

Most "make" programs support a means of specifying the filename (eg most unix variants of make, including gnu make, also accept a "-f <filename>" option).

The rule above for EngineMain will not function as intended. It should probably be;

EngineMain : EngineMain.o Engine.o
                   (tab)gcc -o EngineMain EngineMain.o Engine.o

Actually it should function as intended.... -o doesn't necessarily need a name... the default is a.out.

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