weird behaviour of char *

[nchy13]

i am getting weird result here. if condition at line 25 is satisfied only 4 times while reading cpuinfo but cores is modified each time while loop iterates.
i am not able to think of anything that may cause this.
any help of any sort is appreciated.

#include <stdio.h>
#include <string.h>
#include <assert.h>
int main()
{
char *a="9";
char *b="0";
if(strcmp(a,b)>0)
    printf("started \n");

int cpu=0,flag=0,count=0;
char str1[200],s[100],s2[100],c;
char *ss,*cores,*model,*physid,*prevphysid,*siblings,*ss1,*ss2,*ss3,*ss4;
FILE *fp;
fp=fopen("/proc/cpuinfo","r");

if(fp)
{
    while(fgets(str1,200,fp)!=NULL)
    {

        ss=strtok(str1,":");
        printf("ss is %s \n",ss);
if((strncmp("cpu cores",ss,9)==0)&&count==0)
        {
            printf("rue \n");
            ss1=strtok(NULL,":\t ");
            cores=ss1;
            printf("ss is %s hi \n",ss);
            //cores=ss;
            printf("in loop cores is  %s \n",cores);
            count++;
            flag=1;
        }
printf("cores is %s \n",cores);
}
}
printf("exited \n");

printf("cores is %s \n",cores);
}

here is cpuinfo file which is being read in case you are interested

**processor : 0
vendor_id : GenuineIntel
cpu family : 6
model : 37
model name : Intel(R) Core(TM) i3 CPU M 370 @ 2.40GHz
stepping : 5
cpu MHz : 2394.000
cache size : 3072 KB
physical id : 0
siblings : 4
core id : 0
cpu cores : 2
apicid : 0
initial apicid : 0
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx rdtscp lm constant_tsc arch_perfmon pebs bts xtopology nonstop_tsc aperfmperf pni dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 popcnt lahf_lm arat dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4787.54
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:

processor : 1
vendor_id : GenuineIntel
cpu family : 6
model : 37
model name : Intel(R) Core(TM) i3 CPU M 370 @ 2.40GHz
stepping : 5
cpu MHz : 931.000
cache size : 3072 KB
physical id : 0
siblings : 4
core id : 2
cpu cores : 2
apicid : 4
initial apicid : 4
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx rdtscp lm constant_tsc arch_perfmon pebs bts xtopology nonstop_tsc aperfmperf pni dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 popcnt lahf_lm arat dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4787.90
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:

processor : 2
vendor_id : GenuineIntel
cpu family : 6
model : 37
model name : Intel(R) Core(TM) i3 CPU M 370 @ 2.40GHz
stepping : 5
cpu MHz : 931.000
cache size : 3072 KB
physical id : 0
siblings : 4
core id : 0
cpu cores : 2
apicid : 1
initial apicid : 1
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx rdtscp lm constant_tsc arch_perfmon pebs bts xtopology nonstop_tsc aperfmperf pni dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 popcnt lahf_lm arat dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4787.89
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:

processor : 3
vendor_id : GenuineIntel
cpu family : 6
model : 37
model name : Intel(R) Core(TM) i3 CPU M 370 @ 2.40GHz
stepping : 5
cpu MHz : 931.000
cache size : 3072 KB
physical id : 0
siblings : 4
core id : 2
cpu cores : 2
apicid : 5
initial apicid : 5
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 11
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx rdtscp lm constant_tsc arch_perfmon pebs bts xtopology nonstop_tsc aperfmperf pni dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 popcnt lahf_lm arat dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4787.90
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management:
**

[Ancient Dragon]

The reason cores is modified each time a line is read is because cores is a pointer to the file input buffer str1. Change core to just a single char instead of a pointer so that it will not depend on the contents of str1.

The condition on line 25 seems to work because of the last condition on that line -- where count == 0 and not because ss doesn't change. If you print the value of ss on line 35 you will probably find it has the same behavior as core.

[nchy13]

does it mean that str1 points to the same memory location throughout and each line is stored there only.

[nchy13]

here single char will serve the purpose but what if value of cpucores was greater than 10 instead of 2.
what shall i use to store it then.

[Ancient Dragon]

convert it to int and declare core as int instead of char.

[nchy13]

evrything was fine until i inserted 100 to 125 lines in code.
i am wondering what kv is doing wrong as it is not even printing that version file was opened..
any sort of help is appreciated.
files included in the code are given below for reference.

proc/version file:
Linux version 2.6.38-15-generic (buildd@panlong) (gcc version 4.5.2 (Ubuntu/Linaro 4.5.2-8ubuntu4) ) #65-Ubuntu SMP Thu Jul 26 20:16:13 UTC 2012