hello...
I need a c++ ( or java ) code that convert from eqn ( or bench) format into verilog format...
Did anyone has an idea?!!
Thanks in advanced......
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http://www.embedded.com/news/embeddedindustry/192501421?cid=RSSfeed_embedded_news&_requestid=245414
I dont know much about Verilog But above is a n article about it. Hope it helps you out.
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