Simple Makefile Problem (with a simple dependency)

[gundalav]

Hi all,

I have 4 '.cpp' files and 1 header files:

Tools.cpp
Code1.cpp
Code2.cpp
Code3.cpp

and Tools.hh

Now all

Code1.cpp, Code2.cpp, Code3.cpp

use functions stored in

Tools.cpp

.

Currently, what I do to compile all of them is using
this simple shell script:

#!/bin/bash
echo "compiling Code1.cpp";
g++ Code1.cpp Tools.cpp -o Code1

echo "compiling Code2.cpp";
g++ Code2.cpp Tools.cpp -o Code2 

echo "compiling Code3.cpp";
g++ Code3.cpp Tools.cpp -o Code3

It all works fine.

Now I want to do that using a standard makefile.
But why this doesnt' work:

XX = g++

TOOLSRC = Tools.cpp Code1.cpp Code2.cpp \
Code3.cpp    

TOOLSINC = Tools.hh      

all: Code1 Code2 Code3

Code1: $(TOOLSRC) $(TOOLSINC) makefile
        $(CXX)   

Code2: $(TOOLSRC) $(TOOLSINC) makefile
        $(CXX)   

Code3: $(TOOLSRC) $(TOOLSINC) makefile
        $(CXX)

The error I got is this:

g++
i686-apple-darwin9-g++-4.0.1: no input files
make: *** [Code1] Error 1

[StuXYZ]

hi

You have made a small error with your makefile. I think it is because you have mis-understood what is going on.

First off I have written <tab> to mean a real tab but it would not be clear if I had used one.

The lines of a makefile are

DEPENDENCY_SOLVED: DEPENDENCY_REQUIRED
<TAB>ACTION

Let us examine that with an example:

object.o: myObject.cxx myObject.h
 <tab>g++ -o object.o myObject.cxx

This action says if you want to create object.o you need to find myObject.cxx and myObject.h.

(i) myObject.cxx or myObject.h are defined in the Makefile do their action
(ii) REGARDLESS OF WHAT HAPPENS AT (i) files myObject.h and myObject.cxx need to exist in the current directory, if not report error and stop.
(iii) IF ANY of the dependencies looked at in (ii) are NEWER then any existing object.o THEN run the action.

so to correct your Makefile you need

Code3: $(TOOLSRC) $(TOOLSINC) makefile
<tab>$(CXX) -o Code3 $(TOOLSRC) Code3.cxx

Let us know if you need any more clarification