I have a block of MIPS code that implements a pseudo-instruction operating on the values from two registers. The problem is i am having trouble undertanding what it does. The code is:
sll $t0, $s0, 31
srl $s0, $s0, 1
srl $s1, $s1, 1
or $s1, $s1, $t0
I think it is a divide by 2 checker? If any one can help me out with what it does, that would be great.