I'm trying to replace some MIPS II instructions using MIPS I - namely the branch likely instructions. I'm having difficulty deciding how to do this. Assume that the branch delay slot is implemented.

First off, a branch likely is an instruction that when taken, executes the delay slot instruction whereas when it is not taken, the delay slot instruction is skipped. So..

[U]Taken[/U]          [U]Not Taken[/U]
blezl->mult      blezl          blezl
add              add            sub
sub              mult           ...
...              ...

I might be able emulate this if I could place another conditional branch in the delay slot and toss a nop in front of it. Is it possible to place a conditional branch into the delay slot artificially without having architectural issues?

How else can I do this?

So, here's one solution that I think MAY work. Please let me know if there are any problems with this / any other ways to implement this:

[U]Taken[/U]               [U]Not Taken[/U]
blez->(blez->add)     blez->(blez->add)   blez->(blez->add)
bgtz->sub             bgtz->sub           bgtz->sub
nop                   nop                 nop
[B]add[/B]                   blez->add           sub
blez->mult            nop                 ...
nop                   add         
[B]sub[/B]                   blez->mult
...                   nop
blez->add             mult
nop                   ...

Also, I want to add a jump then nop right before the last blez. This prevents the added code to be traversed in case of a not taken.

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