I was a little confused by the brief explanation that my Assembly teacher gave on pipelining. I don't think I really understand the process that well...

1) In a 4-stage non-pipelined processor, how many clock cycles does it take to execute 3 instructions? Assume each stage takes 1 clock cycle.

2) In a 4-stage pipelined processor, how many clock cycles does it take to execute 3 instructions? Assume each stage takes 2 clock cycle.