I am learning assembly on a MC68HC12.

Can someone explain to me why the overflow flag, V=1, using the asr instruction on following binary number:

%1111 0100
the asr shift would be;
%1111 1010

another example
%0000 0001
the asr shift would be;
%0000 0000
why does V=1

I think I understand how overflow works with addition and subtraction but haven't been able to find a good explanation for its implementation with the shift instructions. Any recommended reading?

7 Years
Discussion Span
Last Post by wildgoose

The ASR Arithmetic Shift Right instruction affects four flags.
N (Negative) Bit set if sign bit (MSB) is set!
Z (Zero) Bit set if result is zero.
C (Carry) Bit Set with previous value in LSB. LSB gets clocked into carry.
V (Negative) XOR (Carry). Bit is set if N:1 C:0 OR N:0 C:1

In your cases you're clocking zero bit from LSB into carry but sign bit is set thus V=1
When you have value of 1, sign bit is 0 and carry bit is 1, so v=1.

N  C    V
0   0   0
0   1   1
1   0   1
1   1   0
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