CC       = gcc
CFLAGS   = -I ../include/
LD       = gcc
EmpCC    = empcc
HVFUTILLDFLAGS = -L/home/empress/HamVeriFeeder/hvfutil/lib -lhvfutil
 
all: BUFR_Decoder.o HVFD.o BUFR_Printer.o
clean:
        rm -f BUFR_Decoder.o HVFD.o BUFR_Printer.o ../lib/libhvfd.a ../bin/BUFR_Printer
BUFR_Decoder: BUFR_Decoder.o
        $(CC) -g -c BUFR_Decoder.c $(CFLAGS)
HVFD: HVFD.o
        $(CC) -g -c HVFD.c $(CFLAGS)
BUFR_Printer: BUFR_Printer.o ../bin/BUFR_Printer
        $(CC) -g -c BUFR_Printer.c $(CFLAGS)
BUFR_Printer.x: ../bin/BUFR_Printer
        $(CC) -o ../bin/BUFR_Printer BUFR_Printer.o BUFR_Decoder.o $(HVFUTILLDFLAGS)
cleanBP:
        rm -f BUFR_Printer.o BUFR_Printer.x

when i do make, it says:
gcc -I ../include/ -c -o BUFR_Decoder.o BUFR_Decoder.c
gcc -I ../include/ -c -o HVFD.o HVFD.c
gcc -I ../include/ -c -o BUFR_Printer.o BUFR_Printer.c


what i want to do is :
if BUFR_Encoder.o is compiled then make BUFR_Encoder executable.

but only BUFR_Encoder.o is compiled, it does not make the executable.

Make 'all' depend on the executables, not the intermediate object files.

Make 'all' depend on the executables, not the intermediate object files.

you should have meant the opposite I think. Because if there's a change in c file, or there is no object file, target is done. So it's object dependent. I think you mean that I can't do that with executables as if I can with object dependency in Makefile.

Am I right?

But your evidence is that your approach sometimes fails, so take it from there.

But I think
all: BUFR_Decoder HVFD BUFR_Printer