AMD Details Next-Generation Processors

APatrizio 1 Tallied Votes 619 Views Share

Every August, the Institute of Electrical and Electronics Engineers (IEEE) holds a two-day symposium known as Hot Chips on the campus of Stanford University. If you've ever walked around the Stanford campus in August, you'd know how appropriate that term is.

It's a gathering of some very smart people with very heavy accents, talking several levels above most people's understanding of microprocessor technology. After all, many of the presenters hold doctorates in electrical engineering and computer science.

The show tends to be a who's-who in the chip field, and this year's show was no exception: Intel (NASDAQ: INTC), AMD (NYSE: AMD), Nvidia (NASDAQ: NVDA) and IBM (NYSE: IBM) all made presentations. In the case of AMD, it was the introduction of its next generation CPU designs, "Bulldozer" and "Bobcat." Both are due next year.

Bulldozer will be a standard CPU core, while Bobcat is the first of the Fusion line. Fusion is the culmination of the 2006 acquisition of ATI Technologies, as these processors will have GPU cores integrated into the CPU and acting just like another CPU core. The CPU will determine which core, the integer CPU or floating point GPU, is best suited to handle the code as it comes in and route that code to the appropriate core.

Bulldozer will be used in high performance systems, while Bobcat will be targeted at power-constrained systems like thin laptops and small form factor desktops. Bulldozer will also eventually migrate to the Opteron server line, replacing the Opteron 6100 (called "Magny-Cours") and Opteron 4100 (codenamed "Lisbon").

AMD didn't want to make Bulldozer a Fusion product because it was already introducing a lot of change. Bulldozer will be AMD's first 32nm processor and it adds quite a bit of new technology and instructions, many of them built around threading and parallelism. Adding Fusion would mean even more change, and more potential for problems.

AMD has been talking about "modules" in the CPU, but it will still promote the CPU by the number of cores. Basically, a module takes redundant features aside from the actual integrated execution pipeline, like Fetch, Decode and Floating Point Scheduler, and shares those components among two logical cores, rather than each core having its own dedicated Fetch, Decode and FP Scheduler.

This allows for two cores per module, but more important, it reduces redundant circuitry and saves power, as well as reduces the die space. Each Bulldozer module contains two integer execution pipelines and two shared 128-bit floating point units, one paired with each integer pipeline unit. Windows and other operating systems measure the number of cores in a system by integer cores, so a four module CPU will appear as an eight-core system to the OS. But AMD is quick to stress that these are eight integer, processing cores, not four cores with two threads each like Intel processors.

The first Bulldozer CPUs will be four-module processors, which effectively means eight cores. Because of the design of the modules, and their shared L3 cache, it will be possible to add on new modules like Lego blocks. The server versions of Bulldozer, "Valencia" and "Interlagos," will have six or eight and 12 or 16 cores, respectively.

Bobcat is the core process technology that does not share components, but it will have an integrated DirectX 11 GPU on board. It will also be a major improvement over older AMD mobile processors. AMD's current CPU cores use anywhere from five to under 20 watts of power. Bobcat will use less than one watt.

Bobcat will come in two separate CPUs: "Ontario," a dual-core processor with a GPU core aimed at low-power notebooks, netbooks and ultra-thin notebooks, and "Llano," a quad-core processor with a more powerful GPU aimed at desktops and more powerful laptops.

Despite being optimized for low power, AMD estimates that it can reduce the CPU size by 50 percent from the prior generation and still keep 90 percent of the performance, plus the GPU will add its own acceleration.